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[/] [openmsp430/] [trunk/] [fpga/] - Rev 195

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151 Add possibility to configure custom Program, Data and Peripheral memory sizes. olivier.girard 4405d 23h /openmsp430/trunk/fpga/
149 Update simulation regression result parser.
Fixed failing SFR test (due to newer MSPGCC version).
Implement request http://opencores.org/bug,view,2171 (burst accesses through the serial debug interface)		 olivier.girard 4409d 01h /openmsp430/trunk/fpga/
143 Update FPGA software examples to support MSPGCC Uniarch. olivier.girard 4480d 01h /openmsp430/trunk/fpga/
138 Update simulation scripts to support Cygwin out of the box for Windows users. olivier.girard 4496d 11h /openmsp430/trunk/fpga/
136 Update all FPGA projects with the latest core version. olivier.girard 4528d 01h /openmsp430/trunk/fpga/
132 Update FPGA examples with the POP.B bug fix olivier.girard 4541d 01h /openmsp430/trunk/fpga/
128 Fixed CALL x(SR) bug (see Bugtracker http://opencores.org/bug,view,2111 ) olivier.girard 4625d 01h /openmsp430/trunk/fpga/
121 Add a new FPGA example for the LX9 Microboard from Avnet.
Many thanks to Ricardo Ribalda Delgado for his contribution on this one :-)		 olivier.girard 4769d 02h /openmsp430/trunk/fpga/
112 Modified comment. olivier.girard 4834d 01h /openmsp430/trunk/fpga/
111 Re-organized the "openMSP430_defines.v" file.
Re-defined the CPU_ID register of the debug interface (in particular to support custom user versioning).
Added RTL configuration possibility to expand the peripheral address space from 512B (0x0000 to 0x0200) to up to 32kB (0x0000 to 0x8000).
As a consequence the per_addr bus width goes from 8 to 14 bits and the peripherals address decoders have been updated accordingly.		 olivier.girard 4835d 01h /openmsp430/trunk/fpga/

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