URL https://opencores.org/ocsvn/openmsp430/openmsp430/trunk

Subversion Repositories openmsp430

[/] [openmsp430/] [trunk/] [fpga/] [actel_m1a3pl_dev_kit/] [rtl/] - Rev 193

Rev	Log message	Author	Age	Path
84	Update SRAM model in the core testbench to prevent the IEEE warning when running simulations. Update watchdog to fix NMI synchronisation problem. Add synchronizers for the PUC signal in the debug interface.	olivier.girard	4976d 22h	/openmsp430/trunk/fpga/actel_m1a3pl_dev_kit/rtl/
82	Update Actel example project: - synthesis scripts. - Spacewar demo program. - SVN ignore patterns for diverse directories	olivier.girard	5022d 22h	/openmsp430/trunk/fpga/actel_m1a3pl_dev_kit/rtl/
81	Initial synthesis, P&R setup for the Actel example project.	olivier.girard	5025d 20h	/openmsp430/trunk/fpga/actel_m1a3pl_dev_kit/rtl/
80	Create initial version of the Actel FPGA implementation example.	olivier.girard	5026d 04h	/openmsp430/trunk/fpga/actel_m1a3pl_dev_kit/rtl/