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Rev Log message Author Age Path
487 ORPSoC main software makefile update julius 4884d 22h /openrisc/
486 ORPSoC updates, mainly software, i2c driver julius 4884d 22h /openrisc/
485 ORPSoC updates - or1200 monitor now has separate defines file, ethmac updates to fifos and wishbone IF, board.h changes for UART (may propegate to other drivers with multiple cores, we'll see), crt0.S for or1200 now zeros all registers on reset, adding own ethernet tests for ML501 julius 4889d 03h /openrisc/
484 Changes to make r12 call-saved and to bring wchar tests in line. jeremybennett 4890d 01h /openrisc/
483 Updated with new opcodes to generate random numbers and to identify us as Or1ksim. jeremybennett 4892d 03h /openrisc/
482 Don't hardcode tool versions in help text olof 4893d 15h /openrisc/
481 OR1200 Update. RTL and spec. julius 4905d 09h /openrisc/
480 ORPSoC updates - ml501 project cleanups, DDR2 cache bug fixes. julius 4906d 07h /openrisc/
479 ORPSoC update to ml501 board port. Memory controller caching fixed up, does multiple lines of cache and Wishbone bursting. julius 4907d 06h /openrisc/
478 ORPSoC update - ml501 or1200 cache configuration set to maximum, some cleanups. julius 4908d 22h /openrisc/

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