URL https://opencores.org/ocsvn/openrisc/openrisc/trunk

Subversion Repositories openrisc

[/] [openrisc/] - Rev 662

Rev	Log message	Author	Age	Path
642	or1200: add carry, overflow bits, and range exception	julius	4671d 15h	/openrisc/
641	or1200: fix serial multiply/divide bug	julius	4671d 15h	/openrisc/
640	or1200: add l.ext instructions, fix a MAC bug	julius	4671d 15h	/openrisc/
639	or1200: or1200_dpram.v change task set_gpr to function	julius	4671d 15h	/openrisc/
638	orpsoc: xilinx: use XILINX env variable instead of rely on custom environment variables, use the XILINX variable and instruct the user how to source the scripts that set it. Signed-off-by: Stefan Kristiansson <stefan.kristiansson@saunalahti.fi>	stekern	4675d 06h	/openrisc/
637	porint parallel port(gpio) management task	filepang	4677d 19h	/openrisc/
636	porting serial port management task, interrupt hander	filepang	4677d 19h	/openrisc/
635	Patch for http://bugzilla.opencores.org/show_bug.cgi?id=69. * config/or32/linux-elf.h <TARGET_OS_CPP_BUILTINS>: Defined, based on LINUX_TARGET_OS_CPP_BUILTINS copied from linux.h.	jeremybennett	4678d 23h	/openrisc/
634	orpsoc: atlys: autoregenerate coregen cores Instead of keeping binary .ngc files of the coregen generated cores, use coregen to generate them from the .xco and .cgp file	stekern	4680d 06h	/openrisc/
633	orpsoc: add Digilent Atlys spartan6 board README Signed-off-by: Stefan Kristiansson <stefan.kristiansson@saunalahti.fi>	stekern	4680d 06h	/openrisc/