URL https://opencores.org/ocsvn/openrisc/openrisc/trunk

Subversion Repositories openrisc

[/] [openrisc/] - Rev 672

Rev	Log message	Author	Age	Path
652	Fix make compile.tcl for actel backend	yannv	4629d 13h	/openrisc/
651	ORPSoC: The ability to use a free/gimped version of Modelsim was restricted to the reference build's scripts. This patch adds support for it to the scripts for the board builds as well. Signed-off-by: Julius Baxter <julius at opencores.org> acked-by: Stefan Kristiansson <stefan.kristiansson at saunalahti.fi>	julius	4634d 08h	/openrisc/
650	ORPSoC: documentation update to fix explanation of Xilinx environment setup, add section for Atlys board, various cleanups	julius	4635d 06h	/openrisc/
649	porting some of standard demo tasks fix serial port(UART) interrupt handler	filepang	4651d 12h	/openrisc/
648	docs: OR1K architecture now labeled as revision 0 in draft spec	julius	4654d 07h	/openrisc/
647	or1200: update documentation to go with recent rtl commits	julius	4654d 08h	/openrisc/
646	Support ORSoC FT4232 board by using second JTAG; should make a command line option.	yannv	4657d 18h	/openrisc/
645	or1200: Specification document source now in asciidoc format. ODT and MS Word format documents deprecated, PDF regenerated	julius	4672d 07h	/openrisc/
644	or1200: the infamous l.rfe fix, and bug fix for when multiply is disabled	julius	4672d 08h	/openrisc/
643	or1200: new ALU comparision implementation option, TLB invalidate register indicated as not present, multiply overflow detection bug fix	julius	4672d 08h	/openrisc/