URL https://opencores.org/ocsvn/openrisc/openrisc/trunk

Subversion Repositories openrisc

[/] [openrisc/] - Rev 678

Rev	Log message	Author	Age	Path
658	example configuration uses RAM startup	skrzyp	4608d 03h	/openrisc/
657	test generation fixed	skrzyp	4608d 05h	/openrisc/
656	orpsoc: cfi_ctrl software driver fix to allow compilation when it's not used	julius	4612d 19h	/openrisc/
655	ORPSoC: add CFI flash controller to ml501, sw driver, tests, app, documentation	julius	4612d 20h	/openrisc/
654	added eCos-3.0 port	skrzyp	4614d 00h	/openrisc/
653	Make gdb link to or1ksim's libsim last, so wrapper works	yannv	4621d 02h	/openrisc/
652	Fix make compile.tcl for actel backend	yannv	4621d 03h	/openrisc/
651	ORPSoC: The ability to use a free/gimped version of Modelsim was restricted to the reference build's scripts. This patch adds support for it to the scripts for the board builds as well. Signed-off-by: Julius Baxter <julius at opencores.org> acked-by: Stefan Kristiansson <stefan.kristiansson at saunalahti.fi>	julius	4625d 22h	/openrisc/
650	ORPSoC: documentation update to fix explanation of Xilinx environment setup, add section for Atlys board, various cleanups	julius	4626d 19h	/openrisc/
649	porting some of standard demo tasks fix serial port(UART) interrupt handler	filepang	4643d 01h	/openrisc/