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Rev Log message Author Age Path
428 or1ksim - adding preliminary PHY emulation to ethernet peripheral. julius 4971d 00h /openrisc/
427 Fixes for C++ to correspond to fixes in uClibc. jeremybennett 4972d 09h /openrisc/
426 ORPSoC update

Reverted back to previous OR1200 instruction cache.
(...which...)
Fixed or1200-except test failure on generic model.

ML501 build not passing or1200-except test. Tried disabling
burst on the bus (memory server doesn't support it yet) to
no avail. To be continued...		 julius 4973d 19h /openrisc/
425 ORPSoC update:

GDB servers in VPI and System C model updated to deal with
packets gdb-7.2 sends.

Documentation updated.

Reference design tests can now be run in or1ksim (added rule
to sim/bin/Makefile). or1200-except doesn't appear to work
as illegal instruction error isn't causing jump to vector.

Updated Or1200 tests to report test success value and then
exit with value 0.		 julius 4973d 20h /openrisc/
424 C++ library, needed for C++ compiler. jeremybennett 4974d 06h /openrisc/
423 Minor typo fixed. jeremybennett 4974d 09h /openrisc/
422 Separates out --force actions, so only build dirs corresponding to targets being built are blown away. jeremybennett 4974d 09h /openrisc/
421 Fixing some typos in bld-all.sh's --help printout and changed all
"cd .." lines to "cd -".		 julius 4977d 07h /openrisc/
420 New feature to trace instructions (option --trace). Manual updated to match. jeremybennett 4979d 05h /openrisc/
419 ORPmon: Fixed interrupt routines in reset.S so they are compatible with new
GCC port (skip over redzone).
Added some defines to easily switch what is done when an error vector
is executed.
Added ability to print out EPCR when crashing.
Changed linker script back to one which doesn't skip over holes in SPI
flash memories.		 julius 4979d 08h /openrisc/

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