URL https://opencores.org/ocsvn/openrisc_me/openrisc_me/trunk

Subversion Repositories openrisc_me

[/] [openrisc/] - Rev 470

Rev	Log message	Author	Age	Path
450	Simplified (and hopefully more reliable) Ethernet MAC/PHY.	jeremybennett	4939d 04h	/openrisc/
449	ORPSoC - or1200_monitor.v additions enabling new experimental execution checks. Replace use of "clean-all" with "distclean" as make rule to clean things.	julius	4941d 00h	/openrisc/
448	Changed or32 to openrisc as Linux architecture name.	jeremybennett	4941d 10h	/openrisc/
447	Updates to register order.	jeremybennett	4942d 04h	/openrisc/
446	gdb-7.2 gdbserver updates.	julius	4942d 23h	/openrisc/
445	gdbserver update to use kernel port ptrace register definitions.	julius	4943d 19h	/openrisc/
444	Changes to ABI handling of varargs.	jeremybennett	4944d 04h	/openrisc/
443	Work in progress on more efficient Ethernet.	jeremybennett	4944d 08h	/openrisc/
442	OR1Ksim - adding trace controlability by SIGUSR1 signal.	julius	4944d 22h	/openrisc/
441	Changes for gdbserver.	jeremybennett	4945d 05h	/openrisc/