OpenCores
URL https://opencores.org/ocsvn/openrisc_me/openrisc_me/trunk

Subversion Repositories openrisc_me

[/] [openrisc/] [tags/] [or1ksim/] [or1ksim-0.5.0rc1/] - Rev 226

Rev

Go to most recent revision

Filtering Options

Clear current filter

Rev Log message Author Age Path
104 Candidate release 0.4.0rc4 jeremybennett 5186d 23h /openrisc/tags/or1ksim/or1ksim-0.5.0rc1/
101 ChangeLog updated for floating point support. Fixed bug in generic peripheral upcalls. Upped release date in configure.ac. Removed redundant debugging print in abstract.c jeremybennett 5195d 17h /openrisc/tags/or1ksim/or1ksim-0.5.0rc1/
100 Single precision FPU stuff for or1ksim julius 5195d 19h /openrisc/tags/or1ksim/or1ksim-0.5.0rc1/
99 Bug in test evaluation for library fixed. jeremybennett 5200d 17h /openrisc/tags/or1ksim/or1ksim-0.5.0rc1/
98 Comprehensive testing of the library JTAG interface. Updates to the documentation to warn of issues in using the memory controller. jeremybennett 5201d 18h /openrisc/tags/or1ksim/or1ksim-0.5.0rc1/
97 Updates to test the new JTAG library interface (not yet complete). jeremybennett 5216d 00h /openrisc/tags/or1ksim/or1ksim-0.5.0rc1/
96 Various changes which had not been picked up in earlier commits. jeremybennett 5217d 01h /openrisc/tags/or1ksim/or1ksim-0.5.0rc1/
95 Some tidy ups to the DejaGNU testing.

All Mark Jarvin's fixes for Mac OS X.
jeremybennett 5218d 17h /openrisc/tags/or1ksim/or1ksim-0.5.0rc1/
93 Additional library tests. Key difference is change to Or1ksim library interface for upcalls to bring closer in to line with SystemC TLM 2.0. jeremybennett 5222d 16h /openrisc/tags/or1ksim/or1ksim-0.5.0rc1/
91 Tidy up of some obsolete configuration code. jeremybennett 5229d 15h /openrisc/tags/or1ksim/or1ksim-0.5.0rc1/

< Prev 1 2

Show All

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.