OpenCores
URL https://opencores.org/ocsvn/openrisc/openrisc/trunk

Subversion Repositories openrisc

[/] [openrisc/] [tags/] [or1ksim/] [or1ksim-0.5.0rc2/] [cpu/] - Rev 388

Rev

Filtering Options

Clear current filter

Rev Log message Author Age Path
118 New tests of multiply. Improved tests of exception handling for addition and division. Improvements to instruction testing library. jeremybennett 5125d 12h /openrisc/tags/or1ksim/or1ksim-0.5.0rc2/cpu/
116 Updated to fix l.maci and add tests for l.mac, l.maci, l.macrc and l.msb. Fixed bugs in the old Or1ksim mul test at the same time. jeremybennett 5127d 15h /openrisc/tags/or1ksim/or1ksim-0.5.0rc2/cpu/
115 Added support for l.fl1 and tests for l.ff1 and l.fl1 jeremybennett 5128d 15h /openrisc/tags/or1ksim/or1ksim-0.5.0rc2/cpu/
114 l.addic added. Tests of l.add, l.addc, l.addi and l.addic completed. All set overflow correctly, triggering a range exception if the OVE bit is set in the SR. jeremybennett 5128d 16h /openrisc/tags/or1ksim/or1ksim-0.5.0rc2/cpu/
112 Tidy ups to Ethernet test fixes. new tests for l.add. Fixes so l.add computes overflow correctly, and generates a range exception if the the OVE bit is set in the supervision register. jeremybennett 5129d 14h /openrisc/tags/or1ksim/or1ksim-0.5.0rc2/cpu/
107 New instruction set testing infrastructure. Fix for l.div/li.divu (Bug 1770) and tests for that bug. jeremybennett 5132d 15h /openrisc/tags/or1ksim/or1ksim-0.5.0rc2/cpu/
104 Candidate release 0.4.0rc4 jeremybennett 5135d 22h /openrisc/tags/or1ksim/or1ksim-0.5.0rc2/cpu/
101 ChangeLog updated for floating point support. Fixed bug in generic peripheral upcalls. Upped release date in configure.ac. Removed redundant debugging print in abstract.c jeremybennett 5144d 16h /openrisc/tags/or1ksim/or1ksim-0.5.0rc2/cpu/
100 Single precision FPU stuff for or1ksim julius 5144d 18h /openrisc/tags/or1ksim/or1ksim-0.5.0rc2/cpu/
98 Comprehensive testing of the library JTAG interface. Updates to the documentation to warn of issues in using the memory controller. jeremybennett 5150d 18h /openrisc/tags/or1ksim/or1ksim-0.5.0rc2/cpu/

< Prev 1 2

Show All

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.