URL https://opencores.org/ocsvn/openrisc/openrisc/trunk

Subversion Repositories openrisc

[/] [openrisc/] [trunk/] - Rev 211

Rev	Log message	Author	Age	Path
191	Updated to clarify use of r9 in the l.jalr delay slot.	jeremybennett	5128d 09h	/openrisc/trunk/
190	Allow the Or1ksim installation directory to be set by option.	jeremybennett	5128d 14h	/openrisc/trunk/
189	Fuller explanation of the build script given.	jeremybennett	5128d 14h	/openrisc/trunk/
188	More rigorous testing of options.	jeremybennett	5128d 15h	/openrisc/trunk/
187	Or1200 sprs FPU update	julius	5130d 08h	/openrisc/trunk/
186	OR1200 RTL FPU fix - RF writeback signal working properly again	julius	5130d 11h	/openrisc/trunk/
185	Adding single precision FPU to or1200, initial checkin, not fully tested yet	julius	5130d 12h	/openrisc/trunk/
184	Fix the UART version of newlib.	jeremybennett	5131d 16h	/openrisc/trunk/
183	Fix to setjmp, so it works. Some commenting tidy ups elsewhere.	jeremybennett	5132d 08h	/openrisc/trunk/
182	Removed redundant code.	jeremybennett	5132d 08h	/openrisc/trunk/