OpenCores
URL https://opencores.org/ocsvn/openrisc/openrisc/trunk

Subversion Repositories openrisc

[/] [openrisc/] [trunk/] - Rev 278

Rev

Go to most recent revision

Filtering Options

Clear current filter

Rev Log message Author Age Path
258 Big OR1200 update - FPU, data cache write-back added, spec updated, ODT format doc now main one, default config set to both caches 8K, all integer arithmetic, FPU off julius 5063d 16h /openrisc/trunk/
257 Changed or1200 supplementary manual from referring or or1200v2 to be just for the or1200 in general julius 5064d 02h /openrisc/trunk/
256 Linux patch update - disabled SCET driver by default julius 5064d 21h /openrisc/trunk/
255 Linux patch update with USB host data cache issue solved, file formatting fixed julius 5066d 23h /openrisc/trunk/
254 Update of Linux patch with USB driver, rename of its or1ksim config file julius 5067d 16h /openrisc/trunk/
253 No need to define PROTOTYPES, now DWARF 2 debugging is the default. jeremybennett 5068d 03h /openrisc/trunk/
252 Changes to use source and line info when DWARF debug data is available. jeremybennett 5068d 03h /openrisc/trunk/
251 Bug in register enum declaration fixed in or32. Bug with empty arguments to
macro VEC_TA_GTY fixed.

* config/or32/or32.h <enum reg_class>: CR_REGS removed from
enumeration.
* vec.h: All references to VEC_TA_GTY with an empty fourth
argument replaced by VEC_TA_GTY_ANON with only three arguments
<VEC_TA_GTY_ANON>: Created.
jeremybennett 5068d 03h /openrisc/trunk/
250 Specify -DPROTOTYPES to work round problems with K&R style declarations in GDB
testsuite.
jeremybennett 5069d 07h /openrisc/trunk/
249 Corrected handling of double args to dummy calls. Better way of determining frame_id.

* or32-tdep.c (or32_push_dummy_call): Corrected handling of double
args provided in two regs.
(or32_frame_cache): Set frame_id based on SP as it will be, even
it not yet computed.
jeremybennett 5069d 07h /openrisc/trunk/

< Prev 1 2

Show All

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.