URL https://opencores.org/ocsvn/openrisc/openrisc/trunk

Subversion Repositories openrisc

[/] [openrisc/] [trunk/] - Rev 455

Rev	Log message	Author	Age	Path
435	ORPSoC updates OR1200 multiply/MAC/division unit update with serial multiply and divide options. Full divide not synthesizable yet. New software tests of multiply and divide functionality.	julius	4949d 13h	/openrisc/trunk/
434	Work in progress with new Ethernet TUN/TAP interface.	jeremybennett	4952d 19h	/openrisc/trunk/
433	New single program interrupt test programs.	jeremybennett	4953d 21h	/openrisc/trunk/
432	Updates to handle interrupts correctly.	jeremybennett	4953d 22h	/openrisc/trunk/
431	Updated and move OR1200 supplementary manual. or_debug_proxy GDB RSP interface fix. ORPSoC S/W and makefile updates.	julius	4955d 21h	/openrisc/trunk/
430	or1ksim - clarifying interrupt behavior in code and documentation.	julius	4956d 19h	/openrisc/trunk/
429	or1ksim update - remove debug printfs from eth MDIO emulation function and fix illegal instruction vector jump for invalid instructions.	julius	4956d 22h	/openrisc/trunk/
428	or1ksim - adding preliminary PHY emulation to ethernet peripheral.	julius	4959d 18h	/openrisc/trunk/
427	Fixes for C++ to correspond to fixes in uClibc.	jeremybennett	4961d 02h	/openrisc/trunk/
426	ORPSoC update Reverted back to previous OR1200 instruction cache. (...which...) Fixed or1200-except test failure on generic model. ML501 build not passing or1200-except test. Tried disabling burst on the bus (memory server doesn't support it yet) to no avail. To be continued...	julius	4962d 13h	/openrisc/trunk/