URL https://opencores.org/ocsvn/openrisc/openrisc/trunk

Subversion Repositories openrisc

[/] [openrisc/] [trunk/] - Rev 530

Rev	Log message	Author	Age	Path
503	ORPSoC's or1200 defines fix to indicate we don't actually have I/DMMU invalidate registers.	julius	4823d 22h	/openrisc/trunk/
502	ORPSoC update - or1200, ethmac Xilinx fifos or1200 in ORPSoC has carry bit, overflow bit, and range exception added and tested. New software tests in ORPSoC library. Ml501 build had ethmac fifos added, and or1200_defines updated to use these new or1200 features by default	julius	4826d 02h	/openrisc/trunk/
501	ORPSoC or1200 mult/mac/divide unit serial arith bug fixed. ORPSoC or1200 defines now use serial divide by default	julius	4827d 02h	/openrisc/trunk/
500	ORPSoC's System C UART model can now accept input from stdin during simulation to drive consoles etc ML501 simulation makefile update to allow custom ELFs to be specified	julius	4827d 05h	/openrisc/trunk/
499	ORPSoC OR1200 updates - added l.ext instructions with tests, ammended some MAC bugs, decode stage cleanup	julius	4827d 22h	/openrisc/trunk/
498	or_debug_proxy updates to documentation and Makefile related to latest ftd2xx driver,	julius	4829d 11h	/openrisc/trunk/
497	or_debug_proxy updates	julius	4830d 07h	/openrisc/trunk/
496	ORPSoC ml501 updates - increased frequency, updated documentation	julius	4830d 08h	/openrisc/trunk/
495	ORPSoC adding more accessor functions to Micron SDRAM model.	julius	4830d 09h	/openrisc/trunk/
494	Change to ensure handles ctrl-C correctly with empty line.	jeremybennett	4841d 02h	/openrisc/trunk/