OpenCores
URL https://opencores.org/ocsvn/openrisc/openrisc/trunk

Subversion Repositories openrisc

[/] [openrisc/] [trunk/] - Rev 572

Rev

Go to most recent revision

Filtering Options

Clear current filter

Rev Log message Author Age Path
552 or1ksim - cpu/ cleanup - remove dynamic execution model WIP, and dlx, or16 targets julius 4769d 11h /openrisc/trunk/
551 Fixed typo (disble->disable) in cache disable functions. yannv 4771d 08h /openrisc/trunk/
550 Turned off verbose output in script. Documented diagnostics in testing. jeremybennett 4771d 08h /openrisc/trunk/
549 Clarified meaning of DEJAGNU. jeremybennett 4771d 08h /openrisc/trunk/
548 New scripts for testing, documentation of testing, fixes to DejaGnu test scripts and updates to scripts. jeremybennett 4771d 09h /openrisc/trunk/
547 ORPSoC dbg_if fix for slow Wishbone slaves julius 4773d 10h /openrisc/trunk/
546 ORPSoC update: Fix WB B3 bursting termination on error in WB B3 RAM model julius 4774d 03h /openrisc/trunk/
545 ORPSoC - revert unecessary i2c fix - driver oneliner was all that was needed. julius 4780d 05h /openrisc/trunk/
544 ORPSoC ordb1a3pe1500 update - adding SD card controller. julius 4780d 12h /openrisc/trunk/
543 i2c_master_slave bug fix for slave, potentially holding SDA low when master wants to send stop. julius 4780d 13h /openrisc/trunk/

< Prev 1 2

Show All

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.