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678 added credits skrzyp 4578d 01h /openrisc/trunk/
677 atlys: add 2-clock synchronizer chain for ddr2_calib_done

The signal ddr2_calib_done signal comes from the ddr2 clock domain,
while wb_req is treating it as if it came from wb_clk domain. As a
result the timing analysis tool assumed a worst case scenario of 5ns
between the two domains and the results were miserable.

While we can argue that this is a multi-cycle path, the fact is that
ddr2_calib_done feeds into multiple logic sinks and can potentially
cause meta-stability issue in the design. The solution is to add a
2-clock meta-stability filter to address both the timing problems and
the meta-stability concern.

Signed-off-by: Jason Zheng <jxzheng@gmail.com>
Signed-off-by: Stefan Kristiansson <stefan.kristiansson@saunalahti.fi>
Acked-by: Olof Kindgren <olof.kindgren@orsoc.se>		 stekern 4586d 00h /openrisc/trunk/
676 Add a libgloss definition file for the new ORSoC OpenRISC development board

Signed-off-by: Olof Kindgren <olof at opencores.org>
acked-by: Yann Vernier <yann.vernier at orsoc.se>		 olof 4594d 06h /openrisc/trunk/
675 FreeRTOSV6.1.1
Source cleanup
Add redzone beyond the stack pointer		 filepang 4616d 17h /openrisc/trunk/
674 or1200: Fix for Bug 76 - Incorrect unsigned integer less-than compare with COMP3 option enabled julius 4620d 06h /openrisc/trunk/
673 Multiple 64-bit fixes (mostly sign and size of constants). Fix bug #1. yannv 4653d 02h /openrisc/trunk/
672 ORPSoC: Fix Bug 76 - Incorrect unsigned integer less-than compare with COMP3 option enabled

OR1200 RTL fix and software test added.		 julius 4656d 17h /openrisc/trunk/
671 ORPSoC: Fix for Bug 75 - or1200-except and or1200-ticksyscall regression tests failing due to change in memory model julius 4656d 17h /openrisc/trunk/
670 Changing bugurl as we have bugzilla now olof 4656d 21h /openrisc/trunk/
669 FreeRTOSV6.1.1
source cleanup, delete uncecessary code		 filepang 4660d 02h /openrisc/trunk/

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