URL https://opencores.org/ocsvn/openrisc/openrisc/trunk

Subversion Repositories openrisc

[/] [openrisc/] [trunk/] [or1ksim/] - Rev 427

Rev	Log message	Author	Age	Path
134	Updates for stable release 0.4.0	jeremybennett	5118d 06h	/openrisc/trunk/or1ksim/
127	New config option to allow l.xori with unsigned operand.	jeremybennett	5124d 02h	/openrisc/trunk/or1ksim/
124	Overflow handling now in line with architecture manual. Tests added.	jeremybennett	5124d 22h	/openrisc/trunk/or1ksim/
123	Implementation of l.mfspr and l.mtspr corrected to use bitwise OR rather than addition. Associated tests added.	jeremybennett	5125d 02h	/openrisc/trunk/or1ksim/
122	Added l.ror and l.rori with associated tests.	jeremybennett	5125d 22h	/openrisc/trunk/or1ksim/
121	Adds exception handling to l.jalr and l.jr. Adds appropriate tests.	jeremybennett	5125d 23h	/openrisc/trunk/or1ksim/
118	New tests of multiply. Improved tests of exception handling for addition and division. Improvements to instruction testing library.	jeremybennett	5126d 20h	/openrisc/trunk/or1ksim/
116	Updated to fix l.maci and add tests for l.mac, l.maci, l.macrc and l.msb. Fixed bugs in the old Or1ksim mul test at the same time.	jeremybennett	5128d 23h	/openrisc/trunk/or1ksim/
115	Added support for l.fl1 and tests for l.ff1 and l.fl1	jeremybennett	5129d 23h	/openrisc/trunk/or1ksim/
114	l.addic added. Tests of l.add, l.addc, l.addi and l.addic completed. All set overflow correctly, triggering a range exception if the OVE bit is set in the SR.	jeremybennett	5130d 00h	/openrisc/trunk/or1ksim/