URL https://opencores.org/ocsvn/openrisc/openrisc/trunk

Subversion Repositories openrisc

[/] [openrisc/] [trunk/] [or1ksim/] - Rev 433

Rev	Log message	Author	Age	Path
224	Add new library functions and modify existing ones. Change the parameter type enumarations to upper case. New (simplified and corrected) config file parsing. No include files or default sim.cfg.	jeremybennett	5105d 23h	/openrisc/trunk/or1ksim/
220	Updated library interface to take a full command line (this will break all old code). Added -q/--quiet and --report-memory-errors flags to command line. Fixed all tests to match this.	jeremybennett	5112d 14h	/openrisc/trunk/or1ksim/
202	Adding executed log in binary format capability to or1ksim	julius	5118d 19h	/openrisc/trunk/or1ksim/
144	Missing file to fix bug 1797.	jeremybennett	5135d 17h	/openrisc/trunk/or1ksim/
143	Fix building for Cygwin with GCC 3.4.4 (Bug 1797). Fix breakpoints with instruction cache enabled (Bug 195).	jeremybennett	5135d 19h	/openrisc/trunk/or1ksim/
134	Updates for stable release 0.4.0	jeremybennett	5143d 23h	/openrisc/trunk/or1ksim/
127	New config option to allow l.xori with unsigned operand.	jeremybennett	5149d 19h	/openrisc/trunk/or1ksim/
124	Overflow handling now in line with architecture manual. Tests added.	jeremybennett	5150d 15h	/openrisc/trunk/or1ksim/
123	Implementation of l.mfspr and l.mtspr corrected to use bitwise OR rather than addition. Associated tests added.	jeremybennett	5150d 19h	/openrisc/trunk/or1ksim/
122	Added l.ror and l.rori with associated tests.	jeremybennett	5151d 15h	/openrisc/trunk/or1ksim/