URL https://opencores.org/ocsvn/openrisc/openrisc/trunk

Subversion Repositories openrisc

[/] [openrisc/] [trunk/] [or1ksim/] [testsuite/] [libsim.tests/] - Rev 771

Rev	Log message	Author	Age	Path
101	ChangeLog updated for floating point support. Fixed bug in generic peripheral upcalls. Upped release date in configure.ac. Removed redundant debugging print in abstract.c	jeremybennett	5143d 05h	/openrisc/trunk/or1ksim/testsuite/libsim.tests/
99	Bug in test evaluation for library fixed.	jeremybennett	5148d 05h	/openrisc/trunk/or1ksim/testsuite/libsim.tests/
98	Comprehensive testing of the library JTAG interface. Updates to the documentation to warn of issues in using the memory controller.	jeremybennett	5149d 06h	/openrisc/trunk/or1ksim/testsuite/libsim.tests/
97	Updates to test the new JTAG library interface (not yet complete).	jeremybennett	5163d 13h	/openrisc/trunk/or1ksim/testsuite/libsim.tests/
95	Some tidy ups to the DejaGNU testing. All Mark Jarvin's fixes for Mac OS X.	jeremybennett	5166d 06h	/openrisc/trunk/or1ksim/testsuite/libsim.tests/
93	Additional library tests. Key difference is change to Or1ksim library interface for upcalls to bring closer in to line with SystemC TLM 2.0.	jeremybennett	5170d 04h	/openrisc/trunk/or1ksim/testsuite/libsim.tests/
91	Tidy up of some obsolete configuration code.	jeremybennett	5177d 03h	/openrisc/trunk/or1ksim/testsuite/libsim.tests/
90	Reorganized to allow tests with both native code (for the library) and OpenRISC code (which requires the target tool chain).	jeremybennett	5177d 04h	/openrisc/trunk/or1ksim/testsuite/libsim.tests/