URL https://opencores.org/ocsvn/openrisc/openrisc/trunk

Subversion Repositories openrisc

[/] [openrisc/] [trunk/] [orpsocv2/] - Rev 132

Rev	Log message	Author	Age	Path
51	ORPSoCv2 updates: cycle accurate profiling, ELF loading	julius	5384d 01h	/openrisc/trunk/orpsocv2/
50	Adding or32_funcs.S	julius	5384d 06h	/openrisc/trunk/orpsocv2/
49	Lots of ORPSoC Updates. Cycle accurate model update. Enabled block read from CPU via debug interface. SMII interface same as devboard but may be broken in sim now. Makefile update	julius	5402d 19h	/openrisc/trunk/orpsocv2/
46	debug interfaces now support byte and non-aligned accesses from gdb	julius	5418d 07h	/openrisc/trunk/orpsocv2/
45	Orpsoc eth test fix and script error message update	julius	5425d 06h	/openrisc/trunk/orpsocv2/
44	New SystemC model monitoring functions, ethernet PHY model and test sw, smii decoder for ethernet PHY, various makefile upgrades	julius	5454d 06h	/openrisc/trunk/orpsocv2/
43	Couple of fixes to ORPSoC, new linux patch version in toolchain script	julius	5478d 03h	/openrisc/trunk/orpsocv2/
42	Fixed ORPSoCv2 VCD dumping and UART output in cycleaccurate model	julius	5494d 00h	/openrisc/trunk/orpsocv2/
41	Update to or1k top	julius	5497d 01h	/openrisc/trunk/orpsocv2/
40	Added GDB server to verilog simulation via VPI and make target to build and run this model	julius	5498d 06h	/openrisc/trunk/orpsocv2/