URL https://opencores.org/ocsvn/openrisc/openrisc/trunk

Subversion Repositories openrisc

[/] [openrisc/] [trunk/] [orpsocv2/] - Rev 161

Rev	Log message	Author	Age	Path
51	ORPSoCv2 updates: cycle accurate profiling, ELF loading	julius	5367d 15h	/openrisc/trunk/orpsocv2/
50	Adding or32_funcs.S	julius	5367d 20h	/openrisc/trunk/orpsocv2/
49	Lots of ORPSoC Updates. Cycle accurate model update. Enabled block read from CPU via debug interface. SMII interface same as devboard but may be broken in sim now. Makefile update	julius	5386d 09h	/openrisc/trunk/orpsocv2/
46	debug interfaces now support byte and non-aligned accesses from gdb	julius	5401d 21h	/openrisc/trunk/orpsocv2/
45	Orpsoc eth test fix and script error message update	julius	5408d 20h	/openrisc/trunk/orpsocv2/
44	New SystemC model monitoring functions, ethernet PHY model and test sw, smii decoder for ethernet PHY, various makefile upgrades	julius	5437d 20h	/openrisc/trunk/orpsocv2/
43	Couple of fixes to ORPSoC, new linux patch version in toolchain script	julius	5461d 17h	/openrisc/trunk/orpsocv2/
42	Fixed ORPSoCv2 VCD dumping and UART output in cycleaccurate model	julius	5477d 14h	/openrisc/trunk/orpsocv2/
41	Update to or1k top	julius	5480d 15h	/openrisc/trunk/orpsocv2/
40	Added GDB server to verilog simulation via VPI and make target to build and run this model	julius	5481d 20h	/openrisc/trunk/orpsocv2/