URL https://opencores.org/ocsvn/openrisc/openrisc/trunk

Subversion Repositories openrisc

[/] [openrisc/] [trunk/] [orpsocv2/] - Rev 194

Rev	Log message	Author	Age	Path
52	ORPSoC update - ability to dump part or all of SRAM contents at the end of simulation	julius	5417d 06h	/openrisc/trunk/orpsocv2/
51	ORPSoCv2 updates: cycle accurate profiling, ELF loading	julius	5431d 08h	/openrisc/trunk/orpsocv2/
50	Adding or32_funcs.S	julius	5431d 13h	/openrisc/trunk/orpsocv2/
49	Lots of ORPSoC Updates. Cycle accurate model update. Enabled block read from CPU via debug interface. SMII interface same as devboard but may be broken in sim now. Makefile update	julius	5450d 02h	/openrisc/trunk/orpsocv2/
46	debug interfaces now support byte and non-aligned accesses from gdb	julius	5465d 14h	/openrisc/trunk/orpsocv2/
45	Orpsoc eth test fix and script error message update	julius	5472d 13h	/openrisc/trunk/orpsocv2/
44	New SystemC model monitoring functions, ethernet PHY model and test sw, smii decoder for ethernet PHY, various makefile upgrades	julius	5501d 13h	/openrisc/trunk/orpsocv2/
43	Couple of fixes to ORPSoC, new linux patch version in toolchain script	julius	5525d 10h	/openrisc/trunk/orpsocv2/
42	Fixed ORPSoCv2 VCD dumping and UART output in cycleaccurate model	julius	5541d 07h	/openrisc/trunk/orpsocv2/
41	Update to or1k top	julius	5544d 08h	/openrisc/trunk/orpsocv2/