URL https://opencores.org/ocsvn/openrisc/openrisc/trunk

Subversion Repositories openrisc

[/] [openrisc/] [trunk/] [orpsocv2/] - Rev 397

Rev	Log message	Author	Age	Path
349	ORPSoCv2 update with new software and makefile update	julius	5016d 01h	/openrisc/trunk/orpsocv2/
348	First stage of ORPSoCv2 update - more to come	julius	5016d 01h	/openrisc/trunk/orpsocv2/
185	Adding single precision FPU to or1200, initial checkin, not fully tested yet	julius	5073d 23h	/openrisc/trunk/orpsocv2/
111	Changed conditionals for Verilator to "verilator" instead of "VERILATOR".	jeremybennett	5106d 01h	/openrisc/trunk/orpsocv2/
78	Fixed typo in Silos workaround script	rherveille	5168d 20h	/openrisc/trunk/orpsocv2/
77	Added support for Silvaco's Silos simulator Added workaround for Silos's exit code behaviour	rherveille	5168d 21h	/openrisc/trunk/orpsocv2/
76	Added: +libext+.v Added: +incdir+.	rherveille	5169d 20h	/openrisc/trunk/orpsocv2/
71	ORPSoC board builds, adding readmes	julius	5212d 06h	/openrisc/trunk/orpsocv2/
70	ORPSoC cycle accurate trace generation now compatible with latest version of Verilator \(3.800\) - This will break VCD generation on systems which earlier verilator versions\!	julius	5216d 11h	/openrisc/trunk/orpsocv2/
69	ORPSoC xilinx ml501 board update - added ethernet eupport and software test	julius	5216d 12h	/openrisc/trunk/orpsocv2/