URL https://opencores.org/ocsvn/openrisc/openrisc/trunk

Subversion Repositories openrisc

[/] [openrisc/] [trunk/] [orpsocv2/] - Rev 400

Rev	Log message	Author	Age	Path
350	Adding new OR1200 processor to ORPSoCv2	julius	5037d 23h	/openrisc/trunk/orpsocv2/
349	ORPSoCv2 update with new software and makefile update	julius	5037d 23h	/openrisc/trunk/orpsocv2/
348	First stage of ORPSoCv2 update - more to come	julius	5037d 23h	/openrisc/trunk/orpsocv2/
185	Adding single precision FPU to or1200, initial checkin, not fully tested yet	julius	5095d 21h	/openrisc/trunk/orpsocv2/
111	Changed conditionals for Verilator to "verilator" instead of "VERILATOR".	jeremybennett	5127d 23h	/openrisc/trunk/orpsocv2/
78	Fixed typo in Silos workaround script	rherveille	5190d 18h	/openrisc/trunk/orpsocv2/
77	Added support for Silvaco's Silos simulator Added workaround for Silos's exit code behaviour	rherveille	5190d 18h	/openrisc/trunk/orpsocv2/
76	Added: +libext+.v Added: +incdir+.	rherveille	5191d 18h	/openrisc/trunk/orpsocv2/
71	ORPSoC board builds, adding readmes	julius	5234d 03h	/openrisc/trunk/orpsocv2/
70	ORPSoC cycle accurate trace generation now compatible with latest version of Verilator \(3.800\) - This will break VCD generation on systems which earlier verilator versions\!	julius	5238d 08h	/openrisc/trunk/orpsocv2/