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Rev Log message Author Age Path
416 ORPSoC doc cleanup - removing symlinks from automake'd docs build path julius 4970d 14h /openrisc/trunk/orpsocv2/
415 ORPSoC - ML501 update, working again.
Documentation update including information on ML501 build
OR1200 updates to do with instruction cache tag signal when
invalidate instruction used.
Added ability to define address to pass to SPI flash when
booting.
Added SPI sw test for board which allows inspection of
data in a flash.		 julius 4970d 14h /openrisc/trunk/orpsocv2/
412 ORPSoC update - Rearranged Xilinx ML501, simulations working again. julius 4974d 04h /openrisc/trunk/orpsocv2/
411 Improved ethmac testbench and software.

Renamed some OR1200 library functions to be more generic.

Fixed bug with versatile_mem_ctrl for Actel board.

Added ability to simulate gatelevel modules alongside RTL modules
in board build.		 julius 4974d 16h /openrisc/trunk/orpsocv2/
410 ORPSoC: Adding README in root explaining how to build documentation, and
documentation fixup so it builds properly again.		 julius 4975d 16h /openrisc/trunk/orpsocv2/
409 ORPSoC: Renamed eth core to ethmac (correct name), added drivers for it.
Updated ethernet MAC's instantiation in ORDB1A3PE1500 board build.
Updated documentation.		 julius 4975d 16h /openrisc/trunk/orpsocv2/
408 ORPSoC update - adding support for ORSoC development board, many changes, documentation update, too. julius 4976d 04h /openrisc/trunk/orpsocv2/
403 ORPSoC big upgrade - intermediate check in. Lots still missing. To come very shortly. julius 4977d 10h /openrisc/trunk/orpsocv2/
398 ORPSoCv2 removing generic backend path - not needed julius 4978d 17h /openrisc/trunk/orpsocv2/
397 ORPSoCv2:

doc/ path added, with Texinfo documentation. Still a work in progress.

VPI files updated.

OR1200 l.maci instruction test added. highlighting bug with immediate field for that instruction.

Various cycle accurate model updates. Now uses orpsoc-defines.v (processed C-compat. version) to build.		 julius 4979d 15h /openrisc/trunk/orpsocv2/

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