URL https://opencores.org/ocsvn/openrisc/openrisc/trunk

Subversion Repositories openrisc

[/] [openrisc/] [trunk/] [orpsocv2/] - Rev 556

Rev	Log message	Author	Age	Path
495	ORPSoC adding more accessor functions to Micron SDRAM model.	julius	4919d 19h	/openrisc/trunk/orpsocv2/
493	ORPSoC VPI JTAG interface, hopefully fix 64-bit machine compile issues.	julius	4932d 21h	/openrisc/trunk/orpsocv2/
492	ORPSoC VPI interface for modelsim and documentation update	julius	4933d 19h	/openrisc/trunk/orpsocv2/
491	ORPSoC or1200_monitor update.	julius	4934d 06h	/openrisc/trunk/orpsocv2/
489	ORPSoC sw cleanup. Remove warnings.	julius	4943d 19h	/openrisc/trunk/orpsocv2/
488	ORPSoC OR1200 driver - tick timer exception handler reverted to generic - cpu tick function hook used as default in handler table. OR1200 timer demo sw for board added.	julius	4943d 19h	/openrisc/trunk/orpsocv2/
487	ORPSoC main software makefile update	julius	4946d 17h	/openrisc/trunk/orpsocv2/
486	ORPSoC updates, mainly software, i2c driver	julius	4946d 17h	/openrisc/trunk/orpsocv2/
485	ORPSoC updates - or1200 monitor now has separate defines file, ethmac updates to fifos and wishbone IF, board.h changes for UART (may propegate to other drivers with multiple cores, we'll see), crt0.S for or1200 now zeros all registers on reset, adding own ethernet tests for ML501	julius	4950d 22h	/openrisc/trunk/orpsocv2/
480	ORPSoC updates - ml501 project cleanups, DDR2 cache bug fixes.	julius	4968d 02h	/openrisc/trunk/orpsocv2/