URL https://opencores.org/ocsvn/openrisc/openrisc/trunk

Subversion Repositories openrisc

[/] [openrisc/] [trunk/] [orpsocv2/] - Rev 567

Rev	Log message	Author	Age	Path
503	ORPSoC's or1200 defines fix to indicate we don't actually have I/DMMU invalidate registers.	julius	4853d 03h	/openrisc/trunk/orpsocv2/
502	ORPSoC update - or1200, ethmac Xilinx fifos or1200 in ORPSoC has carry bit, overflow bit, and range exception added and tested. New software tests in ORPSoC library. Ml501 build had ethmac fifos added, and or1200_defines updated to use these new or1200 features by default	julius	4855d 07h	/openrisc/trunk/orpsocv2/
501	ORPSoC or1200 mult/mac/divide unit serial arith bug fixed. ORPSoC or1200 defines now use serial divide by default	julius	4856d 07h	/openrisc/trunk/orpsocv2/
500	ORPSoC's System C UART model can now accept input from stdin during simulation to drive consoles etc ML501 simulation makefile update to allow custom ELFs to be specified	julius	4856d 10h	/openrisc/trunk/orpsocv2/
499	ORPSoC OR1200 updates - added l.ext instructions with tests, ammended some MAC bugs, decode stage cleanup	julius	4857d 03h	/openrisc/trunk/orpsocv2/
496	ORPSoC ml501 updates - increased frequency, updated documentation	julius	4859d 14h	/openrisc/trunk/orpsocv2/
495	ORPSoC adding more accessor functions to Micron SDRAM model.	julius	4859d 14h	/openrisc/trunk/orpsocv2/
493	ORPSoC VPI JTAG interface, hopefully fix 64-bit machine compile issues.	julius	4872d 16h	/openrisc/trunk/orpsocv2/
492	ORPSoC VPI interface for modelsim and documentation update	julius	4873d 14h	/openrisc/trunk/orpsocv2/
491	ORPSoC or1200_monitor update.	julius	4874d 01h	/openrisc/trunk/orpsocv2/