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Rev Log message Author Age Path
504 ORPSoC ALU update with new comparison configuration option, software test for comparisons and register file comment cleanup julius 4822d 07h /openrisc/trunk/orpsocv2/
503 ORPSoC's or1200 defines fix to indicate we don't actually have I/DMMU invalidate registers. julius 4823d 03h /openrisc/trunk/orpsocv2/
502 ORPSoC update - or1200, ethmac Xilinx fifos
or1200 in ORPSoC has carry bit, overflow bit, and range exception added and tested. New software tests in ORPSoC library. Ml501 build had ethmac fifos added, and or1200_defines updated to use these new or1200 features by default		 julius 4825d 07h /openrisc/trunk/orpsocv2/
501 ORPSoC or1200 mult/mac/divide unit serial arith bug fixed.
ORPSoC or1200 defines now use serial divide by default		 julius 4826d 07h /openrisc/trunk/orpsocv2/
500 ORPSoC's System C UART model can now accept input from stdin during simulation to drive consoles etc

ML501 simulation makefile update to allow custom ELFs to be specified		 julius 4826d 10h /openrisc/trunk/orpsocv2/
499 ORPSoC OR1200 updates - added l.ext instructions with tests, ammended some MAC bugs, decode stage cleanup julius 4827d 03h /openrisc/trunk/orpsocv2/
496 ORPSoC ml501 updates - increased frequency, updated documentation julius 4829d 14h /openrisc/trunk/orpsocv2/
495 ORPSoC adding more accessor functions to Micron SDRAM model. julius 4829d 14h /openrisc/trunk/orpsocv2/
493 ORPSoC VPI JTAG interface, hopefully fix 64-bit machine compile issues. julius 4842d 16h /openrisc/trunk/orpsocv2/
492 ORPSoC VPI interface for modelsim and documentation update julius 4843d 14h /openrisc/trunk/orpsocv2/

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