URL https://opencores.org/ocsvn/openrisc_me/openrisc_me/trunk

Subversion Repositories openrisc_me

[/] [openrisc/] [trunk/] [orpsocv2/] - Rev 85

Rev	Log message	Author	Age	Path
50	Adding or32_funcs.S	julius	5427d 10h	/openrisc/trunk/orpsocv2/
49	Lots of ORPSoC Updates. Cycle accurate model update. Enabled block read from CPU via debug interface. SMII interface same as devboard but may be broken in sim now. Makefile update	julius	5445d 23h	/openrisc/trunk/orpsocv2/
46	debug interfaces now support byte and non-aligned accesses from gdb	julius	5461d 11h	/openrisc/trunk/orpsocv2/
45	Orpsoc eth test fix and script error message update	julius	5468d 10h	/openrisc/trunk/orpsocv2/
44	New SystemC model monitoring functions, ethernet PHY model and test sw, smii decoder for ethernet PHY, various makefile upgrades	julius	5497d 10h	/openrisc/trunk/orpsocv2/
43	Couple of fixes to ORPSoC, new linux patch version in toolchain script	julius	5521d 07h	/openrisc/trunk/orpsocv2/
42	Fixed ORPSoCv2 VCD dumping and UART output in cycleaccurate model	julius	5537d 04h	/openrisc/trunk/orpsocv2/
41	Update to or1k top	julius	5540d 05h	/openrisc/trunk/orpsocv2/
40	Added GDB server to verilog simulation via VPI and make target to build and run this model	julius	5541d 10h	/openrisc/trunk/orpsocv2/
36	Better clean rule in makefile	julius	5555d 11h	/openrisc/trunk/orpsocv2/