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[/] [openrisc/] [trunk/] [orpsocv2/] [boards/] - Rev 546

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Rev Log message Author Age Path
425 ORPSoC update:

GDB servers in VPI and System C model updated to deal with
packets gdb-7.2 sends.

Documentation updated.

Reference design tests can now be run in or1ksim (added rule
to sim/bin/Makefile). or1200-except doesn't appear to work
as illegal instruction error isn't causing jump to vector.

Updated Or1200 tests to report test success value and then
exit with value 0.		 julius 4981d 03h /openrisc/trunk/orpsocv2/boards/
415 ORPSoC - ML501 update, working again.
Documentation update including information on ML501 build
OR1200 updates to do with instruction cache tag signal when
invalidate instruction used.
Added ability to define address to pass to SPI flash when
booting.
Added SPI sw test for board which allows inspection of
data in a flash.		 julius 4989d 12h /openrisc/trunk/orpsocv2/boards/
412 ORPSoC update - Rearranged Xilinx ML501, simulations working again. julius 4993d 02h /openrisc/trunk/orpsocv2/boards/
411 Improved ethmac testbench and software.

Renamed some OR1200 library functions to be more generic.

Fixed bug with versatile_mem_ctrl for Actel board.

Added ability to simulate gatelevel modules alongside RTL modules
in board build.		 julius 4993d 13h /openrisc/trunk/orpsocv2/boards/
409 ORPSoC: Renamed eth core to ethmac (correct name), added drivers for it.
Updated ethernet MAC's instantiation in ORDB1A3PE1500 board build.
Updated documentation.		 julius 4994d 13h /openrisc/trunk/orpsocv2/boards/
408 ORPSoC update - adding support for ORSoC development board, many changes, documentation update, too. julius 4995d 02h /openrisc/trunk/orpsocv2/boards/
360 First checkin of new ORPSoC set up - more to come, all but RTL tests temporarily broken julius 5048d 09h /openrisc/trunk/orpsocv2/boards/
71 ORPSoC board builds, adding readmes julius 5247d 18h /openrisc/trunk/orpsocv2/boards/
69 ORPSoC xilinx ml501 board update - added ethernet eupport and software test julius 5251d 23h /openrisc/trunk/orpsocv2/boards/
67 New synthesizable builds of ORPSoC - first for the Xilinx ML501 Virtex 5 board, with working Xilinx MIG DDR2 Controller - added new pad option to bin2vmem, moved spi controller from or1k_startup module to its own directory julius 5254d 18h /openrisc/trunk/orpsocv2/boards/

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