OpenCores
URL https://opencores.org/ocsvn/openrisc/openrisc/trunk

Subversion Repositories openrisc

[/] [openrisc/] [trunk/] [orpsocv2/] [boards/] - Rev 560

Rev

Go to most recent revision

Filtering Options

Clear current filter

Rev Log message Author Age Path
426 ORPSoC update

Reverted back to previous OR1200 instruction cache.
(...which...)
Fixed or1200-except test failure on generic model.

ML501 build not passing or1200-except test. Tried disabling
burst on the bus (memory server doesn't support it yet) to
no avail. To be continued...
julius 4937d 19h /openrisc/trunk/orpsocv2/boards/
425 ORPSoC update:

GDB servers in VPI and System C model updated to deal with
packets gdb-7.2 sends.

Documentation updated.

Reference design tests can now be run in or1ksim (added rule
to sim/bin/Makefile). or1200-except doesn't appear to work
as illegal instruction error isn't causing jump to vector.

Updated Or1200 tests to report test success value and then
exit with value 0.
julius 4937d 20h /openrisc/trunk/orpsocv2/boards/
415 ORPSoC - ML501 update, working again.
Documentation update including information on ML501 build
OR1200 updates to do with instruction cache tag signal when
invalidate instruction used.
Added ability to define address to pass to SPI flash when
booting.
Added SPI sw test for board which allows inspection of
data in a flash.
julius 4946d 05h /openrisc/trunk/orpsocv2/boards/
412 ORPSoC update - Rearranged Xilinx ML501, simulations working again. julius 4949d 18h /openrisc/trunk/orpsocv2/boards/
411 Improved ethmac testbench and software.

Renamed some OR1200 library functions to be more generic.

Fixed bug with versatile_mem_ctrl for Actel board.

Added ability to simulate gatelevel modules alongside RTL modules
in board build.
julius 4950d 06h /openrisc/trunk/orpsocv2/boards/
409 ORPSoC: Renamed eth core to ethmac (correct name), added drivers for it.
Updated ethernet MAC's instantiation in ORDB1A3PE1500 board build.
Updated documentation.
julius 4951d 06h /openrisc/trunk/orpsocv2/boards/
408 ORPSoC update - adding support for ORSoC development board, many changes, documentation update, too. julius 4951d 19h /openrisc/trunk/orpsocv2/boards/
360 First checkin of new ORPSoC set up - more to come, all but RTL tests temporarily broken julius 5005d 02h /openrisc/trunk/orpsocv2/boards/
71 ORPSoC board builds, adding readmes julius 5204d 10h /openrisc/trunk/orpsocv2/boards/
69 ORPSoC xilinx ml501 board update - added ethernet eupport and software test julius 5208d 16h /openrisc/trunk/orpsocv2/boards/

< Prev 1 2

Show All

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.