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[/] [openrisc/] [trunk/] [orpsocv2/] [boards/] - Rev 638

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Rev Log message Author Age Path
492 ORPSoC VPI interface for modelsim and documentation update julius 4841d 04h /openrisc/trunk/orpsocv2/boards/
486 ORPSoC updates, mainly software, i2c driver julius 4854d 02h /openrisc/trunk/orpsocv2/boards/
485 ORPSoC updates - or1200 monitor now has separate defines file, ethmac updates to fifos and wishbone IF, board.h changes for UART (may propegate to other drivers with multiple cores, we'll see), crt0.S for or1200 now zeros all registers on reset, adding own ethernet tests for ML501 julius 4858d 06h /openrisc/trunk/orpsocv2/boards/
480 ORPSoC updates - ml501 project cleanups, DDR2 cache bug fixes. julius 4875d 11h /openrisc/trunk/orpsocv2/boards/
479 ORPSoC update to ml501 board port. Memory controller caching fixed up, does multiple lines of cache and Wishbone bursting. julius 4876d 10h /openrisc/trunk/orpsocv2/boards/
478 ORPSoC update - ml501 or1200 cache configuration set to maximum, some cleanups. julius 4878d 02h /openrisc/trunk/orpsocv2/boards/
475 ORPSoC main simulation makefile tidy up, addition of BSS test to cbasic test, addition or o1ksim config files for each board build, modification of BSS symbols in linker script and crt0. julius 4879d 06h /openrisc/trunk/orpsocv2/boards/
468 ORPSoC update:
Added USER_ELF and USER_VMEM options to reference design simulation scripts.
Changed use of absolute BOARD_PATH variable to simply BOARD relative to board path
ML501's board.h bootrom default now boot from SPI		 julius 4884d 07h /openrisc/trunk/orpsocv2/boards/
449 ORPSoC - or1200_monitor.v additions enabling new experimental execution checks.

Replace use of "clean-all" with "distclean" as make rule to clean things.		 julius 4910d 21h /openrisc/trunk/orpsocv2/boards/
439 ORPSoC update

Ethernet MAC synthesis issues with Actel Synplify D-2009.12A
Ethernet MAC FIFO synthesis issues with Xilinx XST

Multiply/divide tests for to run on target.

Added third interface to ram_wb module, changed reference design RAM to ram_wb
wrapper. Updated verilog and system C monitor modules accordingly.

Added ability to use ram_wb as internal memory on ML501 design.

Fixed ethernet MAC tests for ML501.		 julius 4918d 00h /openrisc/trunk/orpsocv2/boards/

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