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[/] [openrisc/] [trunk/] [orpsocv2/] [rtl/] [verilog/] - Rev 850

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Rev Log message Author Age Path
543 i2c_master_slave bug fix for slave, potentially holding SDA low when master wants to send stop. julius 4771d 17h /openrisc/trunk/orpsocv2/rtl/verilog/
537 ORPSoC or1200 fix for l.rfe bug, and when multiply is disabled. julius 4788d 04h /openrisc/trunk/orpsocv2/rtl/verilog/
536 ORPSoC - removing duplicate ethmac toplevel file. julius 4791d 17h /openrisc/trunk/orpsocv2/rtl/verilog/
530 ORPSoC update

Ethernet MAC Wishbone interface fixes

Beginnings of software update.

ML501 backend script fixes for new ISE		 julius 4800d 16h /openrisc/trunk/orpsocv2/rtl/verilog/
506 ORPSoC or1200 interrupt and syscall generation test julius 4826d 10h /openrisc/trunk/orpsocv2/rtl/verilog/
505 OR1200 overflow detection fixup

SPIflash program update

or1200 driver library timer improvement		 julius 4826d 11h /openrisc/trunk/orpsocv2/rtl/verilog/
504 ORPSoC ALU update with new comparison configuration option, software test for comparisons and register file comment cleanup julius 4843d 07h /openrisc/trunk/orpsocv2/rtl/verilog/
503 ORPSoC's or1200 defines fix to indicate we don't actually have I/DMMU invalidate registers. julius 4844d 03h /openrisc/trunk/orpsocv2/rtl/verilog/
502 ORPSoC update - or1200, ethmac Xilinx fifos
or1200 in ORPSoC has carry bit, overflow bit, and range exception added and tested. New software tests in ORPSoC library. Ml501 build had ethmac fifos added, and or1200_defines updated to use these new or1200 features by default		 julius 4846d 07h /openrisc/trunk/orpsocv2/rtl/verilog/
501 ORPSoC or1200 mult/mac/divide unit serial arith bug fixed.
ORPSoC or1200 defines now use serial divide by default		 julius 4847d 07h /openrisc/trunk/orpsocv2/rtl/verilog/

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