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[/] [openrisc/] [trunk/] [orpsocv2/] [sw/] - Rev 504

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Rev Log message Author Age Path
431 Updated and move OR1200 supplementary manual.

or_debug_proxy GDB RSP interface fix.

ORPSoC S/W and makefile updates.		 julius 4945d 11h /openrisc/trunk/orpsocv2/sw/
426 ORPSoC update

Reverted back to previous OR1200 instruction cache.
(...which...)
Fixed or1200-except test failure on generic model.

ML501 build not passing or1200-except test. Tried disabling
burst on the bus (memory server doesn't support it yet) to
no avail. To be continued...		 julius 4952d 03h /openrisc/trunk/orpsocv2/sw/
425 ORPSoC update:

GDB servers in VPI and System C model updated to deal with
packets gdb-7.2 sends.

Documentation updated.

Reference design tests can now be run in or1ksim (added rule
to sim/bin/Makefile). or1200-except doesn't appear to work
as illegal instruction error isn't causing jump to vector.

Updated Or1200 tests to report test success value and then
exit with value 0.		 julius 4952d 04h /openrisc/trunk/orpsocv2/sw/
415 ORPSoC - ML501 update, working again.
Documentation update including information on ML501 build
OR1200 updates to do with instruction cache tag signal when
invalidate instruction used.
Added ability to define address to pass to SPI flash when
booting.
Added SPI sw test for board which allows inspection of
data in a flash.		 julius 4960d 13h /openrisc/trunk/orpsocv2/sw/
412 ORPSoC update - Rearranged Xilinx ML501, simulations working again. julius 4964d 03h /openrisc/trunk/orpsocv2/sw/
411 Improved ethmac testbench and software.

Renamed some OR1200 library functions to be more generic.

Fixed bug with versatile_mem_ctrl for Actel board.

Added ability to simulate gatelevel modules alongside RTL modules
in board build.		 julius 4964d 15h /openrisc/trunk/orpsocv2/sw/
409 ORPSoC: Renamed eth core to ethmac (correct name), added drivers for it.
Updated ethernet MAC's instantiation in ORDB1A3PE1500 board build.
Updated documentation.		 julius 4965d 15h /openrisc/trunk/orpsocv2/sw/
408 ORPSoC update - adding support for ORSoC development board, many changes, documentation update, too. julius 4966d 03h /openrisc/trunk/orpsocv2/sw/
403 ORPSoC big upgrade - intermediate check in. Lots still missing. To come very shortly. julius 4967d 09h /openrisc/trunk/orpsocv2/sw/
397 ORPSoCv2:

doc/ path added, with Texinfo documentation. Still a work in progress.

VPI files updated.

OR1200 l.maci instruction test added. highlighting bug with immediate field for that instruction.

Various cycle accurate model updates. Now uses orpsoc-defines.v (processed C-compat. version) to build.		 julius 4969d 14h /openrisc/trunk/orpsocv2/sw/

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