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[/] [openrisc/] [trunk/] [orpsocv2/] [sw/] [tests/] [or1200/] - Rev 803

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426 ORPSoC update

Reverted back to previous OR1200 instruction cache.
(...which...)
Fixed or1200-except test failure on generic model.

ML501 build not passing or1200-except test. Tried disabling
burst on the bus (memory server doesn't support it yet) to
no avail. To be continued...		 julius 4972d 15h /openrisc/trunk/orpsocv2/sw/tests/or1200/
425 ORPSoC update:

GDB servers in VPI and System C model updated to deal with
packets gdb-7.2 sends.

Documentation updated.

Reference design tests can now be run in or1ksim (added rule
to sim/bin/Makefile). or1200-except doesn't appear to work
as illegal instruction error isn't causing jump to vector.

Updated Or1200 tests to report test success value and then
exit with value 0.		 julius 4972d 16h /openrisc/trunk/orpsocv2/sw/tests/or1200/
412 ORPSoC update - Rearranged Xilinx ML501, simulations working again. julius 4984d 15h /openrisc/trunk/orpsocv2/sw/tests/or1200/
408 ORPSoC update - adding support for ORSoC development board, many changes, documentation update, too. julius 4986d 15h /openrisc/trunk/orpsocv2/sw/tests/or1200/
403 ORPSoC big upgrade - intermediate check in. Lots still missing. To come very shortly. julius 4987d 21h /openrisc/trunk/orpsocv2/sw/tests/or1200/
397 ORPSoCv2:

doc/ path added, with Texinfo documentation. Still a work in progress.

VPI files updated.

OR1200 l.maci instruction test added. highlighting bug with immediate field for that instruction.

Various cycle accurate model updates. Now uses orpsoc-defines.v (processed C-compat. version) to build.		 julius 4990d 02h /openrisc/trunk/orpsocv2/sw/tests/or1200/
393 ORPSoCv2 software rearrangement in progress. Basic tests should now run again. julius 4993d 02h /openrisc/trunk/orpsocv2/sw/tests/or1200/

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