URL https://opencores.org/ocsvn/openrisc/openrisc/trunk

Subversion Repositories openrisc

[/] [openrisc/] [trunk/] [rtos/] - Rev 801

Rev	Log message	Author	Age	Path
636	porting serial port management task, interrupt hander	filepang	4663d 07h	/openrisc/trunk/rtos/
624	add missing delay slot instruction vPortDisableInterrupts vPortEnableInterrupts	filepang	4675d 14h	/openrisc/trunk/rtos/
623	cleanup source code Demo/OpenRISC_SIM_GCC/arch/support.h Demo/OpenRISC_SIM_GCC/arch/interrupts.h Demo/OpenRISC_SIM_GCC/arch/link.ld add gpio driver add gpio base address definition	filepang	4676d 06h	/openrisc/trunk/rtos/
622	update uart driver for support multiple uart cores from http://opencores.org/ocsvn/openrisc/openrisc/trunk/orpsocv2/sw/drivers/uart	filepang	4676d 08h	/openrisc/trunk/rtos/
621	update sim.cfg for newer version of Or1ksim. remove unused files. cleanup source code. insert non-local jump(setjmp) in xPortStartScheduler. now xPortStartScheduler() will be returned by xPortEndScheduler().	filepang	4678d 00h	/openrisc/trunk/rtos/
620	remove unused file cleanup makefile update uart_init(), disable interrupt before initialize.	jeremybennett	4678d 13h	/openrisc/trunk/rtos/
616	Initial port of FreeRTOS by filepang (Kim Sung Su).	jeremybennett	4692d 09h	/openrisc/trunk/rtos/
615	Initial port of FreeRTOS by filepang (Kim Sung Su).	jeremybennett	4692d 09h	/openrisc/trunk/rtos/
614	Initial port of FreeRTOS by filepang (Kim Sung Su).	jeremybennett	4692d 09h	/openrisc/trunk/rtos/
613	Initial port of FreeRTOS by filepang (Kim Sung Su).	jeremybennett	4692d 09h	/openrisc/trunk/rtos/