OpenCores
URL https://opencores.org/ocsvn/or1k/or1k/trunk

Subversion Repositories or1k

[/] [or1k/] [branches/] [stable_0_1_x/] - Rev 1015

Rev

Go to most recent revision

Filtering Options

Clear current filter

Rev Log message Author Age Path
993 Fixed IMMU bug. lampret 8001d 19h /or1k/branches/stable_0_1_x/
992 A bug when cache enabled and bus error comes fixed. simons 8002d 04h /or1k/branches/stable_0_1_x/
991 Different memory controller. simons 8002d 04h /or1k/branches/stable_0_1_x/
990 Test is now complete. simons 8002d 04h /or1k/branches/stable_0_1_x/
989 c++ is making problems so, for now, it is excluded. simons 8003d 12h /or1k/branches/stable_0_1_x/
988 ORP architecture supported. simons 8004d 04h /or1k/branches/stable_0_1_x/
987 ORP architecture supported. simons 8004d 11h /or1k/branches/stable_0_1_x/
986 outputs out of function are not registered anymore markom 8004d 12h /or1k/branches/stable_0_1_x/
985 DTLB translation doesn't work on or1ksim when IC/DC enabled. lampret 8004d 23h /or1k/branches/stable_0_1_x/
984 Disable SB until it is tested lampret 8004d 23h /or1k/branches/stable_0_1_x/

< Prev 1 2

Show All

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.