OpenCores
URL https://opencores.org/ocsvn/or1k/or1k/trunk

Subversion Repositories or1k

[/] [or1k/] [branches/] [stable_0_2_x/] [or1ksim/] - Rev 1766

Rev

Go to most recent revision

Filtering Options

Clear current filter

Rev Log message Author Age Path
1596 Fix handling of eof in the sim cli nogj 6849d 20h /or1k/branches/stable_0_2_x/or1ksim/
1595 Add default immu/dmmu page size nogj 6849d 20h /or1k/branches/stable_0_2_x/or1ksim/
1594 Fix the case of is_power2(0) nogj 6849d 20h /or1k/branches/stable_0_2_x/or1ksim/
1593 Don't kill sim on second ctrl+c if the cli prompt has already been shown nogj 6849d 20h /or1k/branches/stable_0_2_x/or1ksim/
1590 Added l.fl1 lampret 6852d 17h /or1k/branches/stable_0_2_x/or1ksim/
1589 Make -d channel be equivalent to -d +channel nogj 6856d 05h /or1k/branches/stable_0_2_x/or1ksim/
1588 Correct INT_MAX->INT32_MAX nogj 6856d 05h /or1k/branches/stable_0_2_x/or1ksim/
1586 Charles Qi
Fix memory handling on big endian machines
nogj 6860d 21h /or1k/branches/stable_0_2_x/or1ksim/
1585 added missing exception, fixes segfault with trap exception phoenix 6866d 14h /or1k/branches/stable_0_2_x/or1ksim/
1584 usability improvments phoenix 6867d 13h /or1k/branches/stable_0_2_x/or1ksim/

< Prev 1 2

Show All

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.