URL https://opencores.org/ocsvn/or1k/or1k/trunk

Subversion Repositories or1k

[/] [or1k/] [tags/] [MW_0_8_9PRE7/] - Rev 643

Rev	Log message	Author	Age	Path
622	Cache test works on hardware.	simons	8195d 07h	/or1k/tags/MW_0_8_9PRE7/
621	Cache test works on hardware.	simons	8195d 08h	/or1k/tags/MW_0_8_9PRE7/
620	use ARITH_SET_FLAG to turn off set flag by arith. instructions	markom	8195d 09h	/or1k/tags/MW_0_8_9PRE7/
619	all test pass, after newest changes	markom	8195d 09h	/or1k/tags/MW_0_8_9PRE7/
618	Fixed display of new 'void' nop insns.	lampret	8195d 17h	/or1k/tags/MW_0_8_9PRE7/
617	Changed 'void' nop-ops instead of insn[0] to use insn[16]. Debug unit stalls the tick timer. Prepared new flag generation for add and and insns. Blocked DC/IC while they are turned off. Fixed I/D MMU SPRs layout except WAYs. TODO: smart IC invalidate, l.j 2 and TLB ways.	lampret	8195d 18h	/or1k/tags/MW_0_8_9PRE7/
616	flags test added	markom	8198d 04h	/or1k/tags/MW_0_8_9PRE7/
615	cmov and extxx instructions; add, addi, and, andi now set flag	markom	8198d 04h	/or1k/tags/MW_0_8_9PRE7/
614	Changed to support new debug if.	simons	8198d 11h	/or1k/tags/MW_0_8_9PRE7/
613	init: trap exception occurs always; initialization of sr not needed anymore	markom	8199d 08h	/or1k/tags/MW_0_8_9PRE7/