URL https://opencores.org/ocsvn/or1k/or1k/trunk

Subversion Repositories or1k

[/] [or1k/] [tags/] [MW_0_8_9PRE7/] - Rev 647

Rev	Log message	Author	Age	Path
626	store buffer added	markom	8192d 08h	/or1k/tags/MW_0_8_9PRE7/
625	Bus error bug fixed. Cache routines added.	simons	8193d 00h	/or1k/tags/MW_0_8_9PRE7/
624	Added logging of writes/read to/from SPR registers.	ivang	8193d 01h	/or1k/tags/MW_0_8_9PRE7/
623	update based on recent changes; arithmetic instructions does not modify carry yet	markom	8193d 03h	/or1k/tags/MW_0_8_9PRE7/
622	Cache test works on hardware.	simons	8193d 06h	/or1k/tags/MW_0_8_9PRE7/
621	Cache test works on hardware.	simons	8193d 07h	/or1k/tags/MW_0_8_9PRE7/
620	use ARITH_SET_FLAG to turn off set flag by arith. instructions	markom	8193d 07h	/or1k/tags/MW_0_8_9PRE7/
619	all test pass, after newest changes	markom	8193d 07h	/or1k/tags/MW_0_8_9PRE7/
618	Fixed display of new 'void' nop insns.	lampret	8193d 16h	/or1k/tags/MW_0_8_9PRE7/
617	Changed 'void' nop-ops instead of insn[0] to use insn[16]. Debug unit stalls the tick timer. Prepared new flag generation for add and and insns. Blocked DC/IC while they are turned off. Fixed I/D MMU SPRs layout except WAYs. TODO: smart IC invalidate, l.j 2 and TLB ways.	lampret	8193d 16h	/or1k/tags/MW_0_8_9PRE7/