URL https://opencores.org/ocsvn/or1k/or1k/trunk

Subversion Repositories or1k

[/] [or1k/] [tags/] [nog_patch_50/] [or1ksim/] [peripheral/] - Rev 344

Rev	Log message	Author	Age	Path
193	Declared RISCOP.RESET to be volatile so that -O2 optimization would not optimize away the correct behavior by trying to be too clever.	chris	8374d 14h	/or1k/tags/nog_patch_50/or1ksim/peripheral/
187	minor change to clear pending exception	chris	8375d 20h	/or1k/tags/nog_patch_50/or1ksim/peripheral/
186	major change to UART structure	chris	8375d 20h	/or1k/tags/nog_patch_50/or1ksim/peripheral/
185	major change to UART code	chris	8375d 20h	/or1k/tags/nog_patch_50/or1ksim/peripheral/
167	- SPR values corrected - testbenches now work - lot of optimizations, use --disable-debugmod for optimal performance - some tick timer bugs fixed	markom	8404d 12h	/or1k/tags/nog_patch_50/or1ksim/peripheral/
148	Replace single stepping patch that got overwritten	chris	8447d 23h	/or1k/tags/nog_patch_50/or1ksim/peripheral/
145	Modifications necessary for functional gdb debugging interface	chris	8448d 14h	/or1k/tags/nog_patch_50/or1ksim/peripheral/
138	- on the fly insn decoding - removed asm input file support - removed string from execution - speedup of loading	markom	8451d 18h	/or1k/tags/nog_patch_50/or1ksim/peripheral/
131	Initial checkin of the Debug Unit register descriptions	chris	8455d 15h	/or1k/tags/nog_patch_50/or1ksim/peripheral/
130	Initial checkin of the debug unit module	chris	8455d 15h	/or1k/tags/nog_patch_50/or1ksim/peripheral/