URL https://opencores.org/ocsvn/or1k/or1k/trunk

Subversion Repositories or1k

[/] [or1k/] [tags/] [nog_patch_52/] [or1ksim/] [cpu/] - Rev 1765

Rev	Log message	Author	Age	Path
1344	* Avoid doing a store in every instruction executed by storeing the instruction function unit in or32_opcodes	nogj	7084d 16h	/or1k/tags/nog_patch_52/or1ksim/cpu/
1343	* Fix warnings in insnset.c and execute.c	nogj	7084d 16h	/or1k/tags/nog_patch_52/or1ksim/cpu/
1342	* Fix generate.c to produce a execgen.c with less warnings. * Fix the --enable-simple configure option.	nogj	7084d 16h	/or1k/tags/nog_patch_52/or1ksim/cpu/
1341	Mark wich operand is the destination operand in the architechture definition	nogj	7084d 16h	/or1k/tags/nog_patch_52/or1ksim/cpu/
1338	l.ff1 instruction added	andreje	7100d 14h	/or1k/tags/nog_patch_52/or1ksim/cpu/
1324	memory access functions fixes	phoenix	7182d 07h	/or1k/tags/nog_patch_52/or1ksim/cpu/
1323	Adrian Wise: or1ksim bugfix & Solaris build	phoenix	7183d 14h	/or1k/tags/nog_patch_52/or1ksim/cpu/
1321	some tests rely on exit(0) as a last std output text to pass	phoenix	7186d 07h	/or1k/tags/nog_patch_52/or1ksim/cpu/
1319	cpu/sim memory accesses separation, tick, exception, nr. of operands, cycles count,... corrections.	phoenix	7188d 07h	/or1k/tags/nog_patch_52/or1ksim/cpu/
1316	added a warning	phoenix	7206d 04h	/or1k/tags/nog_patch_52/or1ksim/cpu/