URL https://opencores.org/ocsvn/or1k/or1k/trunk

Subversion Repositories or1k

[/] [or1k/] [tags/] [nog_patch_62/] [or1ksim/] [cpu/] - Rev 192

Rev	Log message	Author	Age	Path
102	Major update to include PM, PIC, Cache Mngmnt and non-interactive mode.	lampret	8457d 10h	/or1k/tags/nog_patch_62/or1ksim/cpu/
99	* empty log message *	lampret	8472d 11h	/or1k/tags/nog_patch_62/or1ksim/cpu/
98	Return value register is now r9.	lampret	8472d 11h	/or1k/tags/nog_patch_62/or1ksim/cpu/
90	Added tick timer.	lampret	8502d 18h	/or1k/tags/nog_patch_62/or1ksim/cpu/
83	Updates.	lampret	8504d 02h	/or1k/tags/nog_patch_62/or1ksim/cpu/
82	Changed pctemp to pcnext.	lampret	8504d 02h	/or1k/tags/nog_patch_62/or1ksim/cpu/
77	Regular update.	lampret	8657d 08h	/or1k/tags/nog_patch_62/or1ksim/cpu/
68	Added hook for l.sys 204. Changed SPR of flag (no more CCR)	lampret	8676d 08h	/or1k/tags/nog_patch_62/or1ksim/cpu/
67	Added simulator "application load".	lampret	8676d 08h	/or1k/tags/nog_patch_62/or1ksim/cpu/
66	Added another set of eval_ functions that should be used directly by simulator. evalsim_ and setsim_ don't go through MMU transaltion mechanism.	lampret	8676d 08h	/or1k/tags/nog_patch_62/or1ksim/cpu/