URL https://opencores.org/ocsvn/or1k/or1k/trunk

Subversion Repositories or1k

[/] [or1k/] [tags/] [nog_patch_68/] [or1ksim/] [cpu/] [or1k/] - Rev 676

Rev	Log message	Author	Age	Path
450	Exceptions are allways enabled.	simons	8282d 07h	/or1k/tags/nog_patch_68/or1ksim/cpu/or1k/
447	ITLBMR register bit fields set in order.	simons	8283d 09h	/or1k/tags/nog_patch_68/or1ksim/cpu/or1k/
446	ITLBMR register bit fields set in order.	simons	8283d 09h	/or1k/tags/nog_patch_68/or1ksim/cpu/or1k/
437	When lsu instruction produce exception registers are preserved.	simons	8284d 03h	/or1k/tags/nog_patch_68/or1ksim/cpu/or1k/
397	removed or16 architecture	markom	8298d 05h	/or1k/tags/nog_patch_68/or1ksim/cpu/or1k/
381	number display is more strict with 0x prefix with hex numbers	markom	8299d 07h	/or1k/tags/nog_patch_68/or1ksim/cpu/or1k/
378	cleanup in testbench; pc divided into ppc and npc	markom	8299d 08h	/or1k/tags/nog_patch_68/or1ksim/cpu/or1k/
377	cleanup in testbench; pc divided into ppc and npc	markom	8299d 08h	/or1k/tags/nog_patch_68/or1ksim/cpu/or1k/
371	steps toward joining or32.c and opcode/or32.h of or1ksim and gdb; decode.c moved to or32.c	markom	8300d 07h	/or1k/tags/nog_patch_68/or1ksim/cpu/or1k/
344	added acv test for uart; sim debug now has verbose levels; lot of bugs fixed in uart model	markom	8312d 06h	/or1k/tags/nog_patch_68/or1ksim/cpu/or1k/