URL https://opencores.org/ocsvn/or1k/or1k/trunk

Subversion Repositories or1k

[/] [or1k/] [tags/] [rel-0-3-0-rc1/] - Rev 1350

Rev	Log message	Author	Age	Path
1329	Synplify synthesis script first import	jcastillo	7175d 18h	/or1k/tags/rel-0-3-0-rc1/
1327	Firt import of OR1200 over Celoxica RC203 platform	jcastillo	7176d 12h	/or1k/tags/rel-0-3-0-rc1/
1325	Initial import of uClibc-0.9.26	phoenix	7207d 06h	/or1k/tags/rel-0-3-0-rc1/
1324	memory access functions fixes	phoenix	7229d 07h	/or1k/tags/rel-0-3-0-rc1/
1323	Adrian Wise: or1ksim bugfix & Solaris build	phoenix	7230d 13h	/or1k/tags/rel-0-3-0-rc1/
1322	Christian Krauses bugfixes	phoenix	7231d 15h	/or1k/tags/rel-0-3-0-rc1/
1321	some tests rely on exit(0) as a last std output text to pass	phoenix	7233d 06h	/or1k/tags/rel-0-3-0-rc1/
1320	cpu/sim memory accesses separation, tick, exception, nr. of operands, cycles count,... corrections.	phoenix	7235d 06h	/or1k/tags/rel-0-3-0-rc1/
1319	cpu/sim memory accesses separation, tick, exception, nr. of operands, cycles count,... corrections.	phoenix	7235d 06h	/or1k/tags/rel-0-3-0-rc1/
1318	oh well, what a mistake	phoenix	7251d 07h	/or1k/tags/rel-0-3-0-rc1/