URL https://opencores.org/ocsvn/or1k/or1k/trunk

Subversion Repositories or1k

[/] [or1k/] [tags/] [rel-0-3-0-rc1/] [or1ksim/] [cpu/] [or1k/] - Rev 518

Rev	Log message	Author	Age	Path
292	Added TT and PIC SPRs to the status (info command)	lampret	8307d 09h	/or1k/tags/rel-0-3-0-rc1/or1ksim/cpu/or1k/
261	modified memory accesses; added cfg script; added pic test basic entry of vga; some extensions to mc	markom	8312d 01h	/or1k/tags/rel-0-3-0-rc1/or1ksim/cpu/or1k/
255	mtspr() now correctly sets value to register	erez	8313d 21h	/or1k/tags/rel-0-3-0-rc1/or1ksim/cpu/or1k/
254	Made error report more verbose	erez	8313d 21h	/or1k/tags/rel-0-3-0-rc1/or1ksim/cpu/or1k/
242	removed GlobalMode	markom	8319d 03h	/or1k/tags/rel-0-3-0-rc1/or1ksim/cpu/or1k/
221	major changes to testbench; debug unit is moved to /debug; memory organization can be customized; UART from simons; overall cleanup	markom	8321d 01h	/or1k/tags/rel-0-3-0-rc1/or1ksim/cpu/or1k/
196	Configuration SPRs added.	simons	8367d 15h	/or1k/tags/rel-0-3-0-rc1/or1ksim/cpu/or1k/
192	Removed GlobalMode reference causing problems for --disable-debugmod option.	chris	8368d 08h	/or1k/tags/rel-0-3-0-rc1/or1ksim/cpu/or1k/
183	changed special case for PICSR	chris	8369d 05h	/or1k/tags/rel-0-3-0-rc1/or1ksim/cpu/or1k/
182	updated exception handling procedures	chris	8369d 05h	/or1k/tags/rel-0-3-0-rc1/or1ksim/cpu/or1k/