URL https://opencores.org/ocsvn/or1k/or1k/trunk

Subversion Repositories or1k

[/] [or1k/] [tags/] [rel-0-3-0-rc1/] [or1ksim/] [cpu/] [or1k/] - Rev 644

Rev	Log message	Author	Age	Path
446	ITLBMR register bit fields set in order.	simons	8245d 10h	/or1k/tags/rel-0-3-0-rc1/or1ksim/cpu/or1k/
437	When lsu instruction produce exception registers are preserved.	simons	8246d 04h	/or1k/tags/rel-0-3-0-rc1/or1ksim/cpu/or1k/
397	removed or16 architecture	markom	8260d 06h	/or1k/tags/rel-0-3-0-rc1/or1ksim/cpu/or1k/
381	number display is more strict with 0x prefix with hex numbers	markom	8261d 07h	/or1k/tags/rel-0-3-0-rc1/or1ksim/cpu/or1k/
378	cleanup in testbench; pc divided into ppc and npc	markom	8261d 09h	/or1k/tags/rel-0-3-0-rc1/or1ksim/cpu/or1k/
377	cleanup in testbench; pc divided into ppc and npc	markom	8261d 09h	/or1k/tags/rel-0-3-0-rc1/or1ksim/cpu/or1k/
371	steps toward joining or32.c and opcode/or32.h of or1ksim and gdb; decode.c moved to or32.c	markom	8262d 08h	/or1k/tags/rel-0-3-0-rc1/or1ksim/cpu/or1k/
344	added acv test for uart; sim debug now has verbose levels; lot of bugs fixed in uart model	markom	8274d 06h	/or1k/tags/rel-0-3-0-rc1/or1ksim/cpu/or1k/
309	more tests run; added cfg capabilities for tests	markom	8280d 03h	/or1k/tags/rel-0-3-0-rc1/or1ksim/cpu/or1k/
292	Added TT and PIC SPRs to the status (info command)	lampret	8281d 16h	/or1k/tags/rel-0-3-0-rc1/or1ksim/cpu/or1k/