OpenCores
URL https://opencores.org/ocsvn/or1k/or1k/trunk

Subversion Repositories or1k

[/] [or1k/] [tags/] [rel-0-3-0-rc1/] [or1ksim/] [peripheral/] - Rev 1711

Rev

Go to most recent revision

Filtering Options

Clear current filter

Rev Log message Author Age Path
1598 Handle ethernet addresses as an address and not as an int nogj 6827d 17h /or1k/tags/rel-0-3-0-rc1/or1ksim/peripheral/
1586 Charles Qi
Fix memory handling on big endian machines
nogj 6838d 19h /or1k/tags/rel-0-3-0-rc1/or1ksim/peripheral/
1576 configure updates phoenix 6866d 11h /or1k/tags/rel-0-3-0-rc1/or1ksim/peripheral/
1567 Hush noisy message that was making test think that the ethernet test failed nogj 6888d 17h /or1k/tags/rel-0-3-0-rc1/or1ksim/peripheral/
1564 Fix internal clock handling nogj 6888d 17h /or1k/tags/rel-0-3-0-rc1/or1ksim/peripheral/
1563 Fix sending too many interrupts in the uart nogj 6888d 17h /or1k/tags/rel-0-3-0-rc1/or1ksim/peripheral/
1557 Fix most warnings issued by gcc4 nogj 6890d 01h /or1k/tags/rel-0-3-0-rc1/or1ksim/peripheral/
1556 Create an 8-bit program load function to be able to load an unaligned section nogj 6890d 01h /or1k/tags/rel-0-3-0-rc1/or1ksim/peripheral/
1549 Spelling fixes nogj 6951d 14h /or1k/tags/rel-0-3-0-rc1/or1ksim/peripheral/
1519 Add a usefull trace to the mc nogj 6956d 22h /or1k/tags/rel-0-3-0-rc1/or1ksim/peripheral/

< Prev 1 2

Show All

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.