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[/] [or1k/] [tags/] [rel-0-3-0-rc2/] - Rev 412

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Rev Log message Author Age Path
390 Changed instantiation name of VS RAMs. lampret 8266d 02h /or1k/tags/rel-0-3-0-rc2/
389 Changed default delay for load and store in superscalar cpu. lampret 8266d 02h /or1k/tags/rel-0-3-0-rc2/
388 Added comments for cpu section. lampret 8266d 02h /or1k/tags/rel-0-3-0-rc2/
387 Now FPGA and ASIC target are separate. lampret 8266d 03h /or1k/tags/rel-0-3-0-rc2/
386 Fixed VS RAM instantiation - again. lampret 8266d 04h /or1k/tags/rel-0-3-0-rc2/
385 check testbench now modified to work with new report output markom 8266d 10h /or1k/tags/rel-0-3-0-rc2/
384 modified simmem.cfg structure! ADD > BEFORE EACH LINE! markom 8266d 11h /or1k/tags/rel-0-3-0-rc2/
383 modified simmem.cfg structure! ADD markom 8266d 11h /or1k/tags/rel-0-3-0-rc2/
382 bitmask function bug fixed markom 8266d 13h /or1k/tags/rel-0-3-0-rc2/
381 number display is more strict with 0x prefix with hex numbers markom 8266d 13h /or1k/tags/rel-0-3-0-rc2/

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