URL https://opencores.org/ocsvn/or1k/or1k/trunk

Subversion Repositories or1k

[/] [or1k/] [tags/] [rel-0-3-0-rc2/] - Rev 905

Rev	Log message	Author	Age	Path
882	Routine for adjusting read and write delay for devices added.	simons	8072d 03h	/or1k/tags/rel-0-3-0-rc2/
881	Normally uart rx and tx files should be in the current folder.	mohor	8072d 20h	/or1k/tags/rel-0-3-0-rc2/
880	Library should not be erased during clean.	mohor	8072d 21h	/or1k/tags/rel-0-3-0-rc2/
879	Initial version of OpenRISC Custom Unit Compiler added	markom	8075d 00h	/or1k/tags/rel-0-3-0-rc2/
878	first release of atabug	rherveille	8076d 17h	/or1k/tags/rel-0-3-0-rc2/
877	ata beta release	rherveille	8076d 17h	/or1k/tags/rel-0-3-0-rc2/
876	Beta release of ATA simulation	rherveille	8076d 18h	/or1k/tags/rel-0-3-0-rc2/
875	libgcc is moved here to avoid the mess with the folders.	simons	8077d 06h	/or1k/tags/rel-0-3-0-rc2/
874	Command for displaying trace buffer added.	simons	8085d 00h	/or1k/tags/rel-0-3-0-rc2/
873	There is a problem with CRC generation, it has to be fixed in the future.	simons	8096d 06h	/or1k/tags/rel-0-3-0-rc2/